Hi, It is a long time headache for me to increase a data of std_logic_vector by 1. Here are examples: LIBRARY ieee; USE...

Hi, It is a long time headache for me to increase a data of std_logic_vector by 1. Here are examples: LIBRARY ieee; USE ieee.std_logic_1164.all; use ieee.numeric_std.all; constant ONE : std_logic_vector(7 downto 0); signal Series_Number : std_logic_vector(7 downto 0); ... All followings generate errors in VHDL-2002: Series_Number

Hi FPGA Experts, How can we measure ps of delays in FPGA with minimum area and good accuracy ? Today's TDC (Time to Digital Converter)...

Hi FPGA Experts, How can we measure ps of delays in FPGA with minimum area and good accuracy ? Today's TDC (Time to Digital Converter) architectures suffer lot of drawbacks like high gate utilization, High number of delay cells required for high resolution, Longer dead time, dependant on PVT conditions etc. Regards Parth

Hi folks, It looks like Enterpoint (www.enterpoint.co.uk) has closed down. I've got one of their Drigmorn2 dev boards and some of the addon...

Hi folks, It looks like Enterpoint (www.enterpoint.co.uk) has closed down. I've got one of their Drigmorn2 dev boards and some of the addon modules. Does anyone have a copy of these documents? - Ethernet PHY schematic (ETHERNET_PHY_V2.pdf or ETHERNET_PROJECT.pdf) - Cy7C68014 USB2 Slave module schematic (USB_SLAVE_MODULE.pdf) Sadly they're missing from the Internet Archive version of thei...

Hi, From the first day when I started using ModelSim, a troublesome warning from ModelSim accompanies me each time I use ModelSim. I use...

Hi, From the first day when I started using ModelSim, a troublesome warning from ModelSim accompanies me each time I use ModelSim. I use Notepad++ to edit my *.vhd files, after recompiling the files, it always shows the following error report: # Compile of *.vhd was successful. # ** Error: # g # Unable to replace existing ini file (xxx.mpf). File can not be renamed. # ** Error:...

Hi, I want to run ModelSim overnight when I am sleeping. How to run an application overnight with the display off in the laptop with Windows...

Hi, I want to run ModelSim overnight when I am sleeping. How to run an application overnight with the display off in the laptop with Windows 10? Is there a shortcut keystroke to turn the screen off while running an application background? Thank you. Weng

Hi, I have a certain interest in a mathematical puzzle that I have not been able to solve using a normal CPU, and I thought that using an...

Hi, I have a certain interest in a mathematical puzzle that I have not been able to solve using a normal CPU, and I thought that using an FPGA could work. For this, I would like to assign some work packages to search for certain numbers to the FPGA, which then processes them and returns the data, plus an indication that it has finished with that particular package. The task at hand i...

Hi, How to turn off the cursor note pane when the cursor stops at the wave pane of ModelSim during simulation? A cursor note pane is shown at...

Hi, How to turn off the cursor note pane when the cursor stops at the wave pane of ModelSim during simulation? A cursor note pane is shown at the wave pane of ModelSim with yellow background color when the cursor stops at a signal line, showing the signal path and name. Thank you. Weng

Hi, Intel ModelSim Starter Edition is available free now! https://fpgasoftware.intel.com/ 10,000 line code limit, VHDL-2002 version,...

Hi, Intel ModelSim Starter Edition is available free now! https://fpgasoftware.intel.com/ 10,000 line code limit, VHDL-2002 version, running speed is very very slow, but it is enough for debugging grammars. It needs to take 3 hours to download Starter Edition part 1 and part 2 of 7.3G, regardless of how your download speed is. Weng

Hi, I have an application where replacing the configuration of the FPGA will occur frequently and hence I do not want to use the built-in...

Hi, I have an application where replacing the configuration of the FPGA will occur frequently and hence I do not want to use the built-in FLASH. Having an always-blank device on the board is perfectly fine. The MachXO2 chip is ideal for many reasons, so I don't want to replace it with a purely SRAM-based FPGA. Now, the "MachXO2 Programming and Configuration Usage Guide" says the FL...

In case you missed it Aldec (Jim Lewis) is doing a webinars series on VHDL2019. https://www.aldec.com/en/company/events It looks like I...

In case you missed it Aldec (Jim Lewis) is doing a webinars series on VHDL2019. https://www.aldec.com/en/company/events It looks like I missed the first one as it start with Part2, Regards, Hans. www.ht-lab.com