Efficient implementation of FIR filters on a FPGA

Started by DHMarinov 3 years ago2 replieslatest reply 3 years ago114 views

Hello there,

I made a short video in which I present a way to implement FIR filters on FPGA (Xilinx) by using only DSP slices. You can check it out here: 

I'd be glad if you give me some feedback. 
Also, is this the correct way to post content should I decide to do this more often?  

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Reply by kazJanuary 10, 2021

Thanks for the video.

It is good corner you pointed at. In the 2010s I used DSPBuilder for various FIR filters (single or multirate) and noticed that in many occasions it was implementing the filtering computations on dsp blocks only. The result was very fast designs.

It sounds like doing a design in a small Asic island within fpga.


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Reply by DHMarinovJanuary 10, 2021

Noted :)