Circuit Design and Simulation with VHDL
This text offers a comprehensive treatment of VHDL and its applications to the design and simulation of real, industry-standard circuits. It focuses on the use of VHDL rather than solely on the language, showing why and how certain types of circuits are inferred from the language constructs and how any of the four simulation categories can be implemented. It makes a rigorous distinction between VHDL for synthesis and VHDL for simulation. The VHDL codes in all design examples are complete, and circuit diagrams, physical synthesis in FPGAs, simulation results, and explanatory comments are included with the designs. The text reviews fundamental concepts of digital electronics and design and includes a series of appendixes that offer tutorials on important design tools including ISE, Quartus II, and ModelSim, as well as descriptions of programmable logic devices in which the designs are implemented, the DE2 development board, standard VHDL packages, and other features. All four VHDL editions (1987, 1993, 2002, and 2008) are covered. This expanded second edition is the first textbook on VHDL to include a detailed analysis of circuit simulation with VHDL testbenches in all four categories (nonautomated, fully automated, functional, and timing simulations), accompanied by complete practical examples. Chapters 1--9 have been updated, with new design examples and new details on such topics as data types and code statements. Chapter 10 is entirely new and deals exclusively with simulation. Chapters 11--17 are also entirely new, presenting extended and advanced designs with theoretical and practical coverage of serial data communications circuits, video circuits, and other topics. There are many more illustrations, and the exercises have been updated and their number more than doubled.
Why Read This Book
You will get a hands-on, example-rich introduction to writing VHDL for real circuits and learn why certain language constructs infer specific hardware. The book emphasizes the difference between models for simulation and models for synthesis and walks you from basic constructs to FPGA implementation and testbenches.
Who Will Benefit
Engineers or advanced students who know digital logic and want a practical, synthesis-aware VHDL guide to design, simulate, and map RTL to FPGAs.
Level: Intermediate — Prerequisites: Basic digital logic (combinational and sequential circuits), Boolean algebra, and familiarity with programming concepts; no prior VHDL required but helpful.
Key Takeaways
- Write synthesizable VHDL for combinational and sequential circuits using clear coding styles.
- Distinguish and apply the four simulation modeling categories (behavioral, dataflow, structural, and RTL) and understand synthesis implications.
- Construct effective VHDL testbenches and use simulation to verify designs before synthesis.
- Infer the hardware that results from VHDL constructs and avoid common synthesis pitfalls and mismatches.
- Map and synthesize VHDL designs for FPGAs and interpret synthesis results and timing/synthesis reports.
- Design and simulate real-world examples (adders, multipliers, state machines, simple CPUs) to reinforce RTL design practices.
Topics Covered
- Introduction and review of digital fundamentals
- Overview of VHDL and design flow
- VHDL data types, operators, and basic language constructs
- Concurrent statements and structural modeling
- Sequential statements, processes, and RTL coding
- Modeling styles: behavioral, dataflow, structural, and their synthesis implications
- Subprograms, packages, and modular design
- Testbench creation, stimulus generation, and simulation strategies
- Synthesis concepts, constraints, and common pitfalls
- FPGA physical synthesis and implementation examples
- Timing analysis, simulation vs. synthesis mismatches, and debugging
- Design examples: arithmetic blocks, state machines, and small processors
- Appendices: VHDL syntax reference and simulation tools
Languages, Platforms & Tools
How It Compares
More applied and example-driven than Peter Ashenden's The Designer's Guide to VHDL (which is more exhaustive and reference-oriented); more synthesis/FPGA-focused than introductory primers like Douglas Perry's VHDL books.
