FPGA Implementation of Digital Filters

Chi-Jui Chou, Satish Mohanakrishnan

HistoricalIntermediate

Digital Filtering algorithms are most commonly implemented using general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and application-specific integrated circuits (ASICs) for higher rates. This paper describes an approach to the implementation of digital filter algorithms based on field programmable gate arrays (FPGAs). The advantages of the FPGA approach to digital filter implementation include higher sampling rates than are available from traditional DSP chips, lower costs than an ASIC for moderate volume applications, and more flexibility than the alternate approaches. Since many current FPGA architectures are in-system programmable, the configuration of the device may be changed to implement different functionality if required. Our examples illustrate that the FPGA approach is both flexible and provides performance comparable or superior to traditional approaches.

Summary

This 1993 paper presents an FPGA-centered approach to implementing digital filtering algorithms, showing how FPGAs can deliver higher sampling rates and greater flexibility than DSP chips and lower cost than ASICs for moderate volumes. Readers will learn practical design considerations for mapping digital filters onto FPGA architectures and the benefits of in-system programmability.

Key Takeaways

Explain the performance and cost trade-offs between FPGAs, general-purpose DSP chips, and ASICs for digital filter implementations
Design pipelined multiplier-accumulator (MAC) structures and map filter arithmetic efficiently to FPGA resources
Optimize fixed-point scaling and resource sharing to meet sampling-rate and area constraints on FPGA devices
Evaluate the benefits of in-system programmable FPGAs for deploying and updating filter functionality without respinning hardware

Who Should Read This

FPGA and DSP engineers (intermediate level) who design or evaluate digital filter implementations and need to compare FPGA, DSP chip, and ASIC approaches for audio and high-rate applications.

HistoricalIntermediate