StrangeCPU #1. A new CPU
Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even...
Summary
This blog introduces StrangeCPU, a novel CPU microarchitecture built around a token machine that maps 8-bit tokens to wide 32-bit address spaces; the author presents design rationale, implementation notes and source code. Readers will learn how the token-based addressing works, how the CPU is realized in HDL, and practical considerations for synthesizing and testing the design on FPGAs.
Key Takeaways
- Describe the token-machine concept and how an 8-bit token can resolve to arbitrary 32-bit addresses
- Implement the core CPU structures and token-resolution logic in HDL from the provided code and notes
- Simulate and validate the CPU behavior using testbenches and the design's example workloads
- Adapt and port HDL components between Verilog/SystemVerilog and VHDL and prepare them for FPGA synthesis
- Assess FPGA implementation issues such as resource usage, memory mapping and integration with embedded systems
Who Should Read This
FPGA and CPU designers with HDL experience who want to explore unconventional addressing schemes and practical FPGA implementation of custom embedded processors.
Still RelevantAdvanced
Related Documents
- VHDL Tutorial Still RelevantIntermediate
- Performance driven FPGA design with an ASIC perspective Still RelevantAdvanced
- Free Range VHDL Still RelevantIntermediate
- FPGA-based reconfigurable on-board computing systems for space applications Still RelevantAdvanced
- How to do Math's in FPGA - Using VHDL 2008 Still RelevantIntermediate






