Choosing an Implementation Approach
I outline why I chose a CPU-like Graph Cut Processing Unit for FPGA-based graph-cut work, contrasting whole-problem and streaming approaches from the literature. The plan maps push-relabel style augmenting-path iterations to a simple GCPU state machine and pseudocode, prioritizing staged, testable development now and leaving highly parallel streaming scaling for later.
Little to no benefit from C based HLS
Christopher shows why C-based HLS delivers little practical benefit compared with a MyHDL RTL approach, using a Vivado HLS median-filter example. He walks through the sort-network median, compares C and MyHDL implementations, and argues MyHDL is as concise while providing clearer microarchitecture control. The post emphasizes that choosing the right algorithm is the hard part, and HLS won’t replace hardware understanding.
Little to no benefit from C based HLS
Christopher shows why C-based HLS delivers little practical benefit compared with a MyHDL RTL approach, using a Vivado HLS median-filter example. He walks through the sort-network median, compares C and MyHDL implementations, and argues MyHDL is as concise while providing clearer microarchitecture control. The post emphasizes that choosing the right algorithm is the hard part, and HLS won’t replace hardware understanding.
Choosing an Implementation Approach
I outline why I chose a CPU-like Graph Cut Processing Unit for FPGA-based graph-cut work, contrasting whole-problem and streaming approaches from the literature. The plan maps push-relabel style augmenting-path iterations to a simple GCPU state machine and pseudocode, prioritizing staged, testable development now and leaving highly parallel streaming scaling for later.
Little to no benefit from C based HLS
Christopher shows why C-based HLS delivers little practical benefit compared with a MyHDL RTL approach, using a Vivado HLS median-filter example. He walks through the sort-network median, compares C and MyHDL implementations, and argues MyHDL is as concise while providing clearer microarchitecture control. The post emphasizes that choosing the right algorithm is the hard part, and HLS won’t replace hardware understanding.
Choosing an Implementation Approach
I outline why I chose a CPU-like Graph Cut Processing Unit for FPGA-based graph-cut work, contrasting whole-problem and streaming approaches from the literature. The plan maps push-relabel style augmenting-path iterations to a simple GCPU state machine and pseudocode, prioritizing staged, testable development now and leaving highly parallel streaming scaling for later.
