Accelerating Gauss-Newton Filters on FPGAs
Radar tracking filters are generally computationally expensive, involving the manipulation of large matrices and deeply nested loops. In addition, they must generally work in real-time to be of any use. The now-common Kalman Filter was developed in the 1960's specifically for the purposes of lowering its computational burden, so that it could be implemented using the limited computational resources of the time. However, with the exponential increases in computing power since then, it is now possible to reconsider more heavy-weight, robust algorithms such as the original nonrecursive Gauss-Newton filter on which the Kalman filter is based[54]. This dissertation investigates the acceleration of such a filter using FPGA technology, making use of custom, reduced-precision number formats.
Summary
This master's thesis evaluates accelerating the nonrecursive Gauss-Newton radar tracking filter on FPGAs by mapping its matrix-heavy computations to reconfigurable hardware and using custom reduced-precision number formats. The reader will learn how algorithmic choices, precision reduction, and hardware mapping affect real-time performance and resource trade-offs for FPGA-based DSP implementations.
Key Takeaways
- Compare the Gauss-Newton filter to Kalman approaches and identify when a nonrecursive implementation is beneficial for tracking accuracy versus computational cost.
- Implement core matrix operations (multiplication, inversion, factorization) on FPGA-friendly architectures using pipelining and parallelism.
- Design and apply reduced-precision fixed-point formats to balance resource usage and numerical accuracy for real-time filter execution.
- Evaluate performance and resource trade-offs (latency, throughput, LUTs/BRAMs/DSPs) for different hardware mappings and optimization strategies.
- Adapt high-level algorithm constructs to hardware through HLS or RTL patterns to achieve deterministic, real-time behavior.
Who Should Read This
FPGA and DSP engineers, graduate students, and system architects with experience in digital signal processing and hardware design who need to implement real-time tracking filters on FPGAs.
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