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Homebrew CPUs: Messing around with a J1

Victor Yurkovsky ● May 29, 2015

In this article I will examine James Bowman's excellent J1 CPU; I will then proceed to mess around with various parts of it, making it smaller, more appropriate to my particular application, and possibly faster.  I hope this will show you how easy it is to fiddle around with homemade CPUs and encourage you to make something weird and wonderful.

J1 CPU

My hat is off to James Bowman.  J1 is pretty cool.  It is a stack machine; it executes instructions in one cycle, it is...

PC and SP for a small CPU

Victor Yurkovsky ● July 23, 2013

Ok, let's make a small stack-based CPU.

I will start where the rubber meets the road - the PC/stack subsystem that I like referring to as the 'legs'. As usual, I will present a design with a twist.

Not having a large design team, deadlines and million-dollar fab runs when designing CPUs creates a truly different environment. I can actually sit at the kitchen table and doodle around with CPU designs to my heart's content. I can try really ridiculous approaches, and work without a...

PicoBlaze - Program RAM Access for an Interactive Monitor

Victor Yurkovsky ● June 14, 2013●2 comments

I have a confession to make: I love PicoBlaze!  There are many reasons to love it.  It is a tiny CPU (96 Spartan3 slices or 26 Spartan6 slices plus a BRAM).  It is simple.  It is bug-free.  It's pretty fast.  It can reduce the size and the complexity of your design - instead of debugging a big state machine, just throw one (or more) of these in.  Add a serial output and you can debug your fpga from inside out!However, there are a few problems.  The...

StrangeCPU #4. Microcode

Victor Yurkovsky ● May 13, 2013●7 comments
Summary:

Sliding windows containing runs of microcode.

Table of Contents:

StrangeCPU #3. Instruction Slides - The Strangest CPU Yet!

Victor Yurkovsky ● March 18, 2013●11 comments
Summary:

Decoding instructions with a Sliding Window system.  0-Bit Sliding Register Windows.

Table of Contents:

StrangeCPU #2. Sliding Window Token Machines

Victor Yurkovsky ● March 5, 2013●13 comments
Summary:

An in-depth exploration of Sliding Window Token Machines; ARM notes.

Table of Contents:

StrangeCPU #1. A new CPU

Victor Yurkovsky ● February 24, 2013●6 comments

Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using not much more than an adder.

Table of Contents:
  • Part 1: A new CPU - technology review, re-examination of the premises;  StrangeCPU concepts; x86 notes.

Designing a FPGA Micro Pt2 - Clock and Counter build and test.

Paul J Clarke ● June 26, 2012●1 comment

So last time I looked and talked about designing my own PIC12F509. I concluded by talking shortly about the clock that is used inside the chip. If you have not read this it may be a good time to jump back and read what I have written so far. I’ll be putting links back at the top of every blog from now on to help.State Machine ‘v’ Micro in a FPGADesigning a FPGA Micro Pt1 - Start The ClockOk so this last week I started writing the VHDL code for my PIC core that I’ll be...

Designing a FPGA Micro Pt1 - Start The Clock

Paul J Clarke ● May 22, 2012

Last time I talked about state machines and micro’s inside FPGAs and why you may want to consider having a micro. So lets say you have decided you want or need a micro in your FPGA design. Where will you start? Well there are lots to pick from but one option is to design your own. So with that in mind I decided to set myself the challenge of doing just that.

 

StrangeCPU #1. A new CPU

Victor Yurkovsky ● February 24, 2013●6 comments

Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using not much more than an adder.

Table of Contents:
  • Part 1: A new CPU - technology review, re-examination of the premises;  StrangeCPU concepts; x86 notes.

StrangeCPU #2. Sliding Window Token Machines

Victor Yurkovsky ● March 5, 2013●13 comments
Summary:

An in-depth exploration of Sliding Window Token Machines; ARM notes.

Table of Contents:

Homebrew CPUs: Messing around with a J1

Victor Yurkovsky ● May 29, 2015

In this article I will examine James Bowman's excellent J1 CPU; I will then proceed to mess around with various parts of it, making it smaller, more appropriate to my particular application, and possibly faster.  I hope this will show you how easy it is to fiddle around with homemade CPUs and encourage you to make something weird and wonderful.

J1 CPU

My hat is off to James Bowman.  J1 is pretty cool.  It is a stack machine; it executes instructions in one cycle, it is...

StrangeCPU #3. Instruction Slides - The Strangest CPU Yet!

Victor Yurkovsky ● March 18, 2013●11 comments
Summary:

Decoding instructions with a Sliding Window system.  0-Bit Sliding Register Windows.

Table of Contents:

PC and SP for a small CPU

Victor Yurkovsky ● July 23, 2013

Ok, let's make a small stack-based CPU.

I will start where the rubber meets the road - the PC/stack subsystem that I like referring to as the 'legs'. As usual, I will present a design with a twist.

Not having a large design team, deadlines and million-dollar fab runs when designing CPUs creates a truly different environment. I can actually sit at the kitchen table and doodle around with CPU designs to my heart's content. I can try really ridiculous approaches, and work without a...

StrangeCPU #4. Microcode

Victor Yurkovsky ● May 13, 2013●7 comments
Summary:

Sliding windows containing runs of microcode.

Table of Contents:

PicoBlaze - Program RAM Access for an Interactive Monitor

Victor Yurkovsky ● June 14, 2013●2 comments

I have a confession to make: I love PicoBlaze!  There are many reasons to love it.  It is a tiny CPU (96 Spartan3 slices or 26 Spartan6 slices plus a BRAM).  It is simple.  It is bug-free.  It's pretty fast.  It can reduce the size and the complexity of your design - instead of debugging a big state machine, just throw one (or more) of these in.  Add a serial output and you can debug your fpga from inside out!However, there are a few problems.  The...

Designing a FPGA Micro Pt1 - Start The Clock

Paul J Clarke ● May 22, 2012

Last time I talked about state machines and micro’s inside FPGAs and why you may want to consider having a micro. So lets say you have decided you want or need a micro in your FPGA design. Where will you start? Well there are lots to pick from but one option is to design your own. So with that in mind I decided to set myself the challenge of doing just that.

 

Designing a FPGA Micro Pt2 - Clock and Counter build and test.

Paul J Clarke ● June 26, 2012●1 comment

So last time I looked and talked about designing my own PIC12F509. I concluded by talking shortly about the clock that is used inside the chip. If you have not read this it may be a good time to jump back and read what I have written so far. I’ll be putting links back at the top of every blog from now on to help.State Machine ‘v’ Micro in a FPGADesigning a FPGA Micro Pt1 - Start The ClockOk so this last week I started writing the VHDL code for my PIC core that I’ll be...