Three more things you need to know when transitioning from MCUs to FPGAs
Take a look at three more important difference between FPGAs and MCUs: "code reuse" vs templating, metastability and blocking vs. non-blocking operations.
Jumping from MCUs to FPGAs - 5 things you need to know
Are you a microcontroller expert beckoned by the siren song of the FPGA? Not long ago, that was me. FPGA-expert friends of mine regularly extolled the virtues of these mysterious components and I wanted in. When I made the leap, I found a world seemingly very familiar, but in reality, vastly different. I found that my years of C programming and microcontroller use often gave pre preconceived interpretations of FPGA resource material which resulted in eye-roll class mistakes in my code. I’ve gleaned five things of vital importance to help you make that transition faster than I did.
Why I would choose an FPGA development board?
Some years ago, when I went to the University, I bought some development boards based on different microcontrollers, and I remember that, although development boards were not expensive, I had to add to the price of the board, the shipping costs...
Computing Fixed-Point Square Roots and Their Reciprocals Using Goldschmidt Algorithm
IntroductionA well known algorithm for computing square roots by iteration is provided by the Newton-Raphson Algorithm. The algorithm determines the square root using iteration until the root has been determined to some user-defined level of...
MyHDL synthesis: from browser to FPGA in five seconds
When it comes to feeding (mostly proprietary) synthesis tools, the most widely supported HDL (hardware design language) is probably plain Verilog, then comes VHDL. The reasons for that are simply based on popularity or the fact that VHDL is a...
Use DPLL to Lock Digital Oscillator to 1PPS Signal
Introduction There are occasions where it is desirable to lock a digital oscillator to an external time reference such as the 1PPS (One Pulse Per Second) signal output from a GPS receiver. One approach would be to synchronize a fixed frequency...
Summer of gateware is coming (again)
How time flies! I swear my last post was a summary of the 2015 summer of gateware. This year (2016) MyHDL is participating in the Google summer of code again, for the second year, continuing as a sub-org of the Python...
Makefiles for Xilinx Tools
Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools. You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together. I am...
Use a Simple Microprogram Controller (MPC) to Speed Development of Complex Microprogrammed State Machines
Introduction This article will describe a synthesizable HDL-based microprogram controller (MPC), or microprogram sequencer (MPS), that can be used to provide the control of a microprogrammed state machine. Unlike the microprogrammed state...
Three more things you need to know when transitioning from MCUs to FPGAs
Take a look at three more important difference between FPGAs and MCUs: "code reuse" vs templating, metastability and blocking vs. non-blocking operations.
Jumping from MCUs to FPGAs - 5 things you need to know
Are you a microcontroller expert beckoned by the siren song of the FPGA? Not long ago, that was me. FPGA-expert friends of mine regularly extolled the virtues of these mysterious components and I wanted in. When I made the leap, I found a world seemingly very familiar, but in reality, vastly different. I found that my years of C programming and microcontroller use often gave pre preconceived interpretations of FPGA resource material which resulted in eye-roll class mistakes in my code. I’ve gleaned five things of vital importance to help you make that transition faster than I did.
Use a Simple Microprogram Controller (MPC) to Speed Development of Complex Microprogrammed State Machines
Introduction This article will describe a synthesizable HDL-based microprogram controller (MPC), or microprogram sequencer (MPS), that can be used to provide the control of a microprogrammed state machine. Unlike the microprogrammed state...
Fit Sixteen (or more) Asynchronous Serial Receivers into the Area of a Standard UART Receiver
Introduction This article will describe a technique, available in many current FPGA architectures, to fit a large amount of logic into a small area. About ten years ago now (Feb/Mar 2005), I helped develop a multi-line Caller ID product....
Why I would choose an FPGA development board?
Some years ago, when I went to the University, I bought some development boards based on different microcontrollers, and I remember that, although development boards were not expensive, I had to add to the price of the board, the shipping costs...
VHDL tutorial - part 2 - Testbench
[quicklinks]In an earlier article I walked through the VHDL coding of a simple design. In this article I will continue the process and create a test bench module to test the earlier design. The Xilinx ISE environment makes it pretty easy to start...
VHDL tutorial
When I was first introduced to "Programmable Logic" several years ago, it was an answer to many of the challenges that I was struggling with. Though the parts were primitive by today's standards (simple PALs verses FPGA), they were an extremely...
VHDL tutorial - A practical example - part 3 - VHDL testbench
In part 1 of this series we focused on the hardware design, including some of the VHDL definitions of the I/O characteristics of the CPLD part. In part 2, we described the VHDL logic of the CPLD for this design. In part...
MyHDL synthesis: from browser to FPGA in five seconds
When it comes to feeding (mostly proprietary) synthesis tools, the most widely supported HDL (hardware design language) is probably plain Verilog, then comes VHDL. The reasons for that are simply based on popularity or the fact that VHDL is a...
