Verilog vs VHDL
Introduction Verilog and VHDL are two industry standard Hardware Description Languages (HDL) that are used in writing programs for electronic integrated circuits (ICs) i.e., ASIC and FPGA. Many system designers face this issue: which HDL...
Jumping from MCUs to FPGAs - 5 things you need to know
Are you a microcontroller expert beckoned by the siren song of the FPGA? Not long ago, that was me. FPGA-expert friends of mine regularly extolled the virtues of these mysterious components and I wanted in. When I made the leap, I found a world seemingly very familiar, but in reality, vastly different. I found that my years of C programming and microcontroller use often gave pre preconceived interpretations of FPGA resource material which resulted in eye-roll class mistakes in my code. I’ve gleaned five things of vital importance to help you make that transition faster than I did.
Computing Fixed-Point Square Roots and Their Reciprocals Using Goldschmidt Algorithm
IntroductionA well known algorithm for computing square roots by iteration is provided by the Newton-Raphson Algorithm. The algorithm determines the square root using iteration until the root has been determined to some user-defined level of...
StrangeCPU #4. Microcode
Summary: Sliding windows containing runs of microcode. Table of Contents: Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes. Part 2: Sliding-Window Token Machines, an...
VHDL tutorial
When I was first introduced to "Programmable Logic" several years ago, it was an answer to many of the challenges that I was struggling with. Though the parts were primitive by today's standards (simple PALs verses FPGA), they were an extremely...
I don’t often convert VHDL to Verilog but when I do ...
VHDL to Verilog I don’t often convert VHDL to Verilog but when I do it is not the most exciting task in the world (that is an understatement). For the most part I am HDL agnostic. Well that is not true, I have a strong...
MyHDL FPGA Tutorial II (Audio Echo)
Introduction This tutorial will walk through an audio echo that can be implemented on an FPGA development board. This tutorial is quite a bit more involved than the previous MyHDL FPGA tutorial. This project will require an...
MyHDL synthesis: from browser to FPGA in five seconds
When it comes to feeding (mostly proprietary) synthesis tools, the most widely supported HDL (hardware design language) is probably plain Verilog, then comes VHDL. The reasons for that are simply based on popularity or the fact that VHDL is a...
How FPGAs work, and why you'll buy one
Today, pretty much everyone has a CPU, a DSP and a GPU, buried somewhere in their PC, phone, car, etc. Most don't know or care that they bought any of these, but they did. Will everyone, at some future point, also buy an FPGA? The market size...
BGA and QFP at Home 1 - A Practical Guide.
It is almost universally accepted by the hobbyists that you can't work with high-density packages at home. That is entirely incorrect. I've been assembling and reflowing BGA circuit boards at home for a few years now. BGAs and...
Elliptic Curve Cryptography
Secure online communications require encryption. One standard is AES (Advanced Encryption Standard) from NIST. But for this to work, both sides need the same key for encryption and decryption. This is called Private Key encryption.
Makefiles for Xilinx Tools
Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools. You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together. I am...
Use a Simple Microprogram Controller (MPC) to Speed Development of Complex Microprogrammed State Machines
Introduction This article will describe a synthesizable HDL-based microprogram controller (MPC), or microprogram sequencer (MPS), that can be used to provide the control of a microprogrammed state machine. Unlike the microprogrammed state...
Fit Sixteen (or more) Asynchronous Serial Receivers into the Area of a Standard UART Receiver
Introduction This article will describe a technique, available in many current FPGA architectures, to fit a large amount of logic into a small area. About ten years ago now (Feb/Mar 2005), I helped develop a multi-line Caller ID product....
I don’t often convert VHDL to Verilog but when I do ...
VHDL to Verilog I don’t often convert VHDL to Verilog but when I do it is not the most exciting task in the world (that is an understatement). For the most part I am HDL agnostic. Well that is not true, I have a strong...
MyHDL @EDAPlayground
Trying out MyHDL became a little easier recently. MyHDL is now avaialbe @EDAPlayground. One can experiment with Python/MyHDL verification of HDL modules and implementing complex digital cirucits in MyHDL. The...
BGA and QFP at Home 1 - A Practical Guide.
It is almost universally accepted by the hobbyists that you can't work with high-density packages at home. That is entirely incorrect. I've been assembling and reflowing BGA circuit boards at home for a few years now. BGAs and...
How FPGAs work, and why you'll buy one
Today, pretty much everyone has a CPU, a DSP and a GPU, buried somewhere in their PC, phone, car, etc. Most don't know or care that they bought any of these, but they did. Will everyone, at some future point, also buy an FPGA? The market size...
StrangeCPU #4. Microcode
Summary: Sliding windows containing runs of microcode. Table of Contents: Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes. Part 2: Sliding-Window Token Machines, an...
StrangeCPU #3. Instruction Slides - The Strangest CPU Yet!
Summary: Decoding instructions with a Sliding Window system. 0-Bit Sliding Register Windows. Table of Contents: Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes. Part 2:...
VHDL tutorial
When I was first introduced to "Programmable Logic" several years ago, it was an answer to many of the challenges that I was struggling with. Though the parts were primitive by today's standards (simple PALs verses FPGA), they were an extremely...
VHDL tutorial - A practical example - part 3 - VHDL testbench
In part 1 of this series we focused on the hardware design, including some of the VHDL definitions of the I/O characteristics of the CPLD part. In part 2, we described the VHDL logic of the CPLD for this design. In part...
MyHDL synthesis: from browser to FPGA in five seconds
When it comes to feeding (mostly proprietary) synthesis tools, the most widely supported HDL (hardware design language) is probably plain Verilog, then comes VHDL. The reasons for that are simply based on popularity or the fact that VHDL is a...
Computing Fixed-Point Square Roots and Their Reciprocals Using Goldschmidt Algorithm
IntroductionA well known algorithm for computing square roots by iteration is provided by the Newton-Raphson Algorithm. The algorithm determines the square root using iteration until the root has been determined to some user-defined level of...
I don’t often convert VHDL to Verilog but when I do ...
VHDL to Verilog I don’t often convert VHDL to Verilog but when I do it is not the most exciting task in the world (that is an understatement). For the most part I am HDL agnostic. Well that is not true, I have a strong...
Makefiles for Xilinx Tools
Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools. You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together. I am...
StrangeCPU #4. Microcode
Summary: Sliding windows containing runs of microcode. Table of Contents: Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes. Part 2: Sliding-Window Token Machines, an...
StrangeCPU #3. Instruction Slides - The Strangest CPU Yet!
Summary: Decoding instructions with a Sliding Window system. 0-Bit Sliding Register Windows. Table of Contents: Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes. Part 2:...
StrangeCPU #1. A new CPU
Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even...
StrangeCPU #2. Sliding Window Token Machines
Summary: An in-depth exploration of Sliding Window Token Machines; ARM notes. Table of Contents: Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes. Part 2: Sliding-Window Token...
