Designing a FPGA Micro Pt2 - Clock and Counter build and test.
So last time I looked and talked about designing my own PIC12F509. I concluded by talking shortly about the clock that is used inside the chip. If you have not read this it may be a good time to jump back and read what I have written so far. I’ll be putting links back at the top of every blog from now on to help.State Machine ‘v’ Micro in a FPGADesigning a FPGA Micro Pt1 - Start The ClockOk so this last week I started writing the VHDL code for my PIC core that I’ll be...
Designing a FPGA Micro Pt1 - Start The Clock
Last time I talked about state machines and micro’s inside FPGAs and why you may want to consider having a micro. So lets say you have decided you want or need a micro in your FPGA design. Where will you start? Well there are lots to pick from but one option is to design your own. So with that in mind I decided to set myself the challenge of doing just that.
Grandiose Delusions
Recently on the MyHDL mailing-list there have been discussions about some other immature Python/HDL tools. In these discussion it was mentioned, how over the years, there has not been a strong set of open-source IP developed using MyHDL. For those that might be unfamiliar with the term IP (intellectual property) it is a term widely used in digital hardware to refer to reusable hardware components or blocks.
Many design languages have relied on that first big...
State Machine ‘v’ Micro in a FPGA
Designing a system and considering if to have a FPGA in the first place is something a engineer should always consider. However one thing that people look to do is designing a microcontroller on a FPGA and in this post I want to consider why we would do it at all and what would be the real consideration for doing this.
We first look at what's available in the microcontroller world. We have a vast range from tiny 8bit 6 pin devices right the way up to monster 32bit devices. These...
My VHDL <= monpjc; Journey
I always like to start my first blog on a website with a bit of a introduction as to who I am and what I’ll be writting about. I feel this gives you the reader a opportunity to see where I’m coming from and understand a little of my point of view. So when I was asked to come and start blogging on FPGARelated I wondered what I should say. So for my first blog its all about how me, aka monpjc, and how I got into VHDL.
It started a long time ago when I was working for a...
MyHDL FPGA Tutorial I (LED Strobe)
Last updated 05-Nov-2015
IntroductionFrom many perspectives the latest FPGA offerings from 'X' and 'A' are large devices - mucho programmable logic resources. Even the devices that one can get for sub \$10 are relatively large. Because of the size of these FPGAs they are implemented using an HDL. To manually configure each circuit would be a long and tedious task. It is not feasible to program an FPGA by manually defining the logic for each LUT and manually...
FPGA or DSP Processor - Parameters to Make the Right Choice
Introduction
Digital Signal Processing (DSP) has a huge global market that is growing fast day by day with rapidly evolving sophisticated modern electronics applications like 3G wireless, voice over internet protocol (VoIP), multimedia systems, radar and satellite systems, medical systems, image-processing applications and consumer electronics. These sophisticated DSP applications pose many conflicting challenges to system designers and application developers in terms of cost and...
Introduction to FPGA Technology
OverviewFPGA stands for Field Programmable Gate Array. An FPGA is an integrated circuit (IC) that can be programmed and configured by the embedded system developer in the field after it has been manufactured. FPGA is a semi-conductor device which is not limited to any pre-defined hardware function; it is rather highly flexible in its functionality and may be configured by the embedded system developer according to his design requirements. FPGAs use pre-built logic blocks and programmable...
USB-FPGA : Introduction
This blog is an introduction to a series of blogs I hope to write. The blogs will cover the design and experiences I had on a project that spanned the last 6 years. The project was the development of an USB FPGA board and the supporting gateware, firmware, and software. The project has had different levels of activity over the years, ranging from none to some, but it has been an ongoing project, albeit, during sleepless nights. Lately, I have ported the HDL (gateware)...
binary hello world
Python + Ohio + MyHDL + FPGARecently I had the opportunity to coordinate a hands-on programmable hardware (FPGA) workshop (open-space) at a regional Python conference - @pyohio. The workshop was for those that had little to no exposure to programmable hardware. For this situation I used two basic examples: two versions of a binary hello world.
The binary hello world -- blinking an LED -- is a good starting point to introduce programmable hardware, hardware descriptions languages,...
Elliptic Curve Digital Signatures
A digital signature is used to prove a message is connected to a specific sender. The sender can not deny they sent that message once signed, and no one can modify the message and maintain the signature. The message itself is not necessarily secret. Certificates of authenticity, digital cash, and software distribution use digital signatures so recipients can verify they are getting what they paid for.
Since messages can be of any length and mathematical algorithms always use fixed...
USB-FPGA : Introduction
This blog is an introduction to a series of blogs I hope to write. The blogs will cover the design and experiences I had on a project that spanned the last 6 years. The project was the development of an USB FPGA board and the supporting gateware, firmware, and software. The project has had different levels of activity over the years, ranging from none to some, but it has been an ongoing project, albeit, during sleepless nights. Lately, I have ported the HDL (gateware)...
MyHDL Interface Example
MyHDL Interfaces ExampleWith the next release of MyHDL, version 0.9, conversion of interfaces will be supported. In this context an interface is any object with a Signal attribute. This can be used to simplify connection between modules and port definitions. For example, if I want to define a simple memory-map bus, the Signals for the bus can be defined as follows:
class BareBoneBus: def __init__(self): self.wr = Signal(False) self.rd =...Designing a FPGA Micro Pt2 - Clock and Counter build and test.
So last time I looked and talked about designing my own PIC12F509. I concluded by talking shortly about the clock that is used inside the chip. If you have not read this it may be a good time to jump back and read what I have written so far. I’ll be putting links back at the top of every blog from now on to help.State Machine ‘v’ Micro in a FPGADesigning a FPGA Micro Pt1 - Start The ClockOk so this last week I started writing the VHDL code for my PIC core that I’ll be...
Designing a FPGA Micro Pt1 - Start The Clock
Last time I talked about state machines and micro’s inside FPGAs and why you may want to consider having a micro. So lets say you have decided you want or need a micro in your FPGA design. Where will you start? Well there are lots to pick from but one option is to design your own. So with that in mind I decided to set myself the challenge of doing just that.
Grandiose Delusions
Recently on the MyHDL mailing-list there have been discussions about some other immature Python/HDL tools. In these discussion it was mentioned, how over the years, there has not been a strong set of open-source IP developed using MyHDL. For those that might be unfamiliar with the term IP (intellectual property) it is a term widely used in digital hardware to refer to reusable hardware components or blocks.
Many design languages have relied on that first big...
MyHDL ... MyPWM
The PWM topic appears to be popular lately on the fpgarelated site. This is coincidence, but I typically find the topic of modulating and demodulating signals interesting. For digital systems it is always entertaining to play with PWMs. The following PWM RTL description is quite a bit different than the PWM module described by Anton Babushkin. The module presented here is a minimal PWM engine defined at design time (i.e. not run-time).
As...
My VHDL <= monpjc; Journey
I always like to start my first blog on a website with a bit of a introduction as to who I am and what I’ll be writting about. I feel this gives you the reader a opportunity to see where I’m coming from and understand a little of my point of view. So when I was asked to come and start blogging on FPGARelated I wondered what I should say. So for my first blog its all about how me, aka monpjc, and how I got into VHDL.
It started a long time ago when I was working for a...
Designing a FPGA Micro Pt1 - Start The Clock
Last time I talked about state machines and micro’s inside FPGAs and why you may want to consider having a micro. So lets say you have decided you want or need a micro in your FPGA design. Where will you start? Well there are lots to pick from but one option is to design your own. So with that in mind I decided to set myself the challenge of doing just that.
State Machine ‘v’ Micro in a FPGA
Designing a system and considering if to have a FPGA in the first place is something a engineer should always consider. However one thing that people look to do is designing a microcontroller on a FPGA and in this post I want to consider why we would do it at all and what would be the real consideration for doing this.
We first look at what's available in the microcontroller world. We have a vast range from tiny 8bit 6 pin devices right the way up to monster 32bit devices. These...
Designing a FPGA Micro Pt2 - Clock and Counter build and test.
So last time I looked and talked about designing my own PIC12F509. I concluded by talking shortly about the clock that is used inside the chip. If you have not read this it may be a good time to jump back and read what I have written so far. I’ll be putting links back at the top of every blog from now on to help.State Machine ‘v’ Micro in a FPGADesigning a FPGA Micro Pt1 - Start The ClockOk so this last week I started writing the VHDL code for my PIC core that I’ll be...
Elliptic Curve Digital Signatures
A digital signature is used to prove a message is connected to a specific sender. The sender can not deny they sent that message once signed, and no one can modify the message and maintain the signature. The message itself is not necessarily secret. Certificates of authenticity, digital cash, and software distribution use digital signatures so recipients can verify they are getting what they paid for.
Since messages can be of any length and mathematical algorithms always use fixed...
Polynomial Math
Elliptic Curve Cryptography is used as a public key infrastructure to secure credit cards, phones and communications links. All these devices use either FPGA's or embedded microprocessors to compute the algorithms that make the mathematics work. While the math is not hard, it can be confusing the first time you see it. This blog is an introduction to the operations of squaring and computing an inverse over a finite field which are used in computing Elliptic Curve arithmetic. ...
MyHDL ... MyPWM
The PWM topic appears to be popular lately on the fpgarelated site. This is coincidence, but I typically find the topic of modulating and demodulating signals interesting. For digital systems it is always entertaining to play with PWMs. The following PWM RTL description is quite a bit different than the PWM module described by Anton Babushkin. The module presented here is a minimal PWM engine defined at design time (i.e. not run-time).
As...
Choosing an Implementation Approach
What one man can do, another can do!--The Edge (1997) Choose the hill you want to die on.--Common saying attributed to the United States Marine Corps Planning out an FPGA Implementation
In my first article, I gave a high-level view of the project that brings me into the world of FPGA development. At the end, I tried to break down the areas of development that would be involved, and some of the knowledge and expertise I would probably have to gain in order to make it a...
Grandiose Delusions
Recently on the MyHDL mailing-list there have been discussions about some other immature Python/HDL tools. In these discussion it was mentioned, how over the years, there has not been a strong set of open-source IP developed using MyHDL. For those that might be unfamiliar with the term IP (intellectual property) it is a term widely used in digital hardware to refer to reusable hardware components or blocks.
Many design languages have relied on that first big...
My VHDL <= monpjc; Journey
I always like to start my first blog on a website with a bit of a introduction as to who I am and what I’ll be writting about. I feel this gives you the reader a opportunity to see where I’m coming from and understand a little of my point of view. So when I was asked to come and start blogging on FPGARelated I wondered what I should say. So for my first blog its all about how me, aka monpjc, and how I got into VHDL.
It started a long time ago when I was working for a...
