Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects
Some Design and Simulation Considerations for Sampled-Data Controllers
This article will continue to look at some aspects of the controllers and electronics needed to create emulated physical circuits with real-world connectivity and will look at the issues that arise in sampled-data controllers compared to continuous-domain controllers. As such, is not intended as an introduction to sampled-data systems.
- Part 1: Introduction
Finally got a drone!
As a reader of my blog, you already know that I have been making videos lately and thoroughly enjoying the process. When I was in Germany early this summer (and went 280 km/h in a porsche!) to produce SEGGER's 25th anniversary video, the company bought a drone so we could get an aerial shot of the party (at about the 1:35 mark in this video). Since then, I have been obsessing on buying a drone for myself and finally made the move a few weeks ago - I acquired a used DJI...
Feedback Controllers - Making Hardware with Firmware. Part 2. Ideal Model Examples
Developing and Validating Simulation ModelsThis article will describe models for simulating the systems and controllers for the hardware emulation application described in Part 1 of the series.
- Part 1: Introduction
- Part 2: Ideal Model Examples
- Part 3: Sampled Data Aspects
- Part 4: Engineering of Evaluation Hardware
- Part 5:
Feedback Controllers - Making Hardware with Firmware. Part I. Introduction
Introduction to the topicThis is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.
- Part 1:
SEGGER's 25th Anniversary Video
Chances are you will find this video more interesting to watch if you take five minutes to first read the story of the week I spent at SEGGER's headquarters at the end of June.
The video is only a little more than 2 minutes long. If you decide to watch it, make sure to go full screen and I would really love to read your thoughts about it in the comments down bellow. Do you think a video like this succeeds in making the viewer want to learn more about the company?...
Linear Feedback Shift Registers for the Uninitiated, Part II: libgf2 and Primitive Polynomials
Last time, we looked at the basics of LFSRs and finite fields formed by the quotient ring \( GF(2)[x]/p(x) \).
LFSRs can be described by a list of binary coefficients, sometimes referred as the polynomial, since they correspond directly to the characteristic polynomial of the quotient ring.
Today we’re going to look at how to perform certain practical calculations in these finite fields. I maintain a Python library called libgf2,...
Went 280km/h (174mph) in a Porsche Panamera in Germany!
Those of you who've been following my blog lately already know that I am going through some sort of mid-life crisis that involves going out there to meet people and make videos. It all started with Embedded World early this year, then continued at ESC Boston a couple of months ago and the latest chapter just concluded as I returned from Germany after spending a week at SEGGER's headquarters to produce a video to highlight their 25th anniversary.
Linear Feedback Shift Registers for the Uninitiated, Part I: Ex-Pralite Monks and Finite Fields
Later there will be, I hope, some people who will find it to their advantage to decipher all this mess.
— Évariste Galois, May 29, 1832
I was going to call this short series of articles “LFSRs for Dummies”, but thought better of it. What is a linear feedback shift register? If you want the short answer, the Wikipedia article is a decent introduction. But these articles are aimed at those of you who want a little bit deeper mathematical...
Going back to Germany!
A couple of blog posts ago, I wrote that the decision to go to ESC Boston ended up being a great one for many different reasons. I came back from the conference energized and really happy that I went.
These feelings were amplified a few days after my return when I received an email from Rolf Segger, the founder of SEGGER Microcontroller (check out their very new website), asking if I would be interested in visiting their headquarters...
ESC Boston's Videos are Now Up
In my last blog, I told you about my experience at ESC Boston and the few videos that I was planning to produce and publish. Here they are, please have a look and any feedback (positive or negative) is appreciated.
Short HighlightThis is a very short (one minute) montage of some of the footage that I shot at the show & conference. In future shows, I absolutely need to insert clips here and there of engineers saying a few words about the conference (why they...
Jumping from MCUs to FPGAs - 5 things you need to know
Are you a microcontroller expert beckoned by the siren song of the FPGA? Not long ago, that was me. FPGA-expert friends of mine regularly extolled the virtues of these mysterious components and I wanted in. When I made the leap, I found a world seemingly very familiar, but in reality, vastly different. I found that my years of C programming and microcontroller use often gave pre preconceived interpretations of FPGA resource material which resulted in eye-roll class mistakes in my code. I’ve gleaned five things of vital importance to help you make that transition faster than I did.
Launch of Youtube Channel: My First Videos - Embedded World 2017
I went to Embedded World 2017 in Nuremberg with an ambitious plan; I would make video highlights of several exhibits (booths) to be presented to the *Related sites audience. I would try to make the vendors focus their pitch on the essential in order to produce a one to three minutes video per booth.
So far my experience with making videos was limited to family videos, so I knew I had lots of reading to do and lots of Youtube videos and tutorials to watch. Trade shows are...
Recruiting New Bloggers!
Previous calls for bloggers have been very successful in recruiting some great communicators - Rick Lyons, Jason Sachs, Victor Yurkovsky, Mike Silva, Markus Nentwig, Gene Breniman, Stephen Friederichs,
Makefiles for Xilinx Tools
Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools. You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together. I am not a huge fan of makefiles either (I believe a language should be expressive enough to automate the build process), but the alternatives are dismal.
Command-line driven workflow is easier on the hands and faster. The example...
Back from ESC Boston
NOT going to ESC Boston would have allowed me to stay home, in my comfort zone.
NOT going to ESC Boston would have saved me from driving in the absolutely horrible & stressful Boston traffic1.
NOT going to ESC Boston would have saved me from having to go through a full search & questioning session at the Canada Customs on my return2.
2017/06/06 update: Videos are now up!So two days...
Three more things you need to know when transitioning from MCUs to FPGAs
Take a look at three more important difference between FPGAs and MCUs: "code reuse" vs templating, metastability and blocking vs. non-blocking operations.
Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers
This final article in the series will look at -ve latency DSP and how it can be used to cancel the unwanted delays in sampled-data systems due to such factors as Nyquist filtering, ADC acquisition, DSP/FPGA algorithm computation time, DAC reconstruction and circuit propagation delays.Some applications demand zero-latency or zero unwanted latency signal processing. Negative latency DSP may sound like the stuff of science fiction or broken physics but the arrangement as...
Spread the Word and Run a Chance to Win a Bundle of Goodies from Embedded World
Do you have a Twitter and/or Linkedin account?
If you do, please consider paying close attention for the next few days to the EmbeddedRelated Twitter account and to my personal Linkedin account (feel free to connect). This is where I will be posting lots of updates about how the EmbeddedRelated.tv live streaming experience is going at Embedded World.
The most successful this live broadcasting experience will be, the better the chances that I will be able to do it...
Learning VHDL - Basics
Since FPGA are becoming more accessible to the hobbyist, learning how to use them can be really useful for certain applications, like DSP and video generation; moreover, engineers that are able to code in VHDL/Verilog are always requested on the job market.
In this tutorial I will cover the basics of Xilinx ISE and VHDL. I willl base my code on the Basys2 board from Digilent: it is really cheap (especially for students) and has a lot of features on board, as you can see from the picture...
Embedded World 2018 - More Videos!
After the interview videos last week, this week I am very happy to release two more videos taken at Embedded World 2018 and that I am proud of.
For both videos, I made extensive use of my two new toys, a Zhiyun Crane Gimbal and a Sony a6300 camera.
The use of a gimbal like the Zhiyun makes a big difference in terms of making the footage look much more stable and cinematographic.
As for the Sony camera, it takes fantastic slow-motion footage and...
Went 280km/h (174mph) in a Porsche Panamera in Germany!
Those of you who've been following my blog lately already know that I am going through some sort of mid-life crisis that involves going out there to meet people and make videos. It all started with Embedded World early this year, then continued at ESC Boston a couple of months ago and the latest chapter just concluded as I returned from Germany after spending a week at SEGGER's headquarters to produce a video to highlight their 25th anniversary.
Inside the Spartan-6: Using LUTs to optimize circuits
While building a small CPU on a Spartan-6 chip I came across the same old problem: my Verilog was mapping to a lot of slices . Way more then seems reasonable. So let's dig in and see what's really going on.
The J1 CPU (see Messing Around with a J1) is an amazingly streamlined design expressed in just over 100 lines of Verilog, and is reasonably compact at 150 Spartan-6 slices (half of that with the modifications described in the article). But the Picoblaze is...
Spline interpolation
A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog
IntroductionSplines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...
Little to no benefit from C based HLS
Last updated 07-Nov-2015
As I write this I am on a plane and my destination is EELive 2014 where I am going to give a talk hardware design: the grunge era. It is a shotgun introduction to three alternative hardware description languages (alt.hdl). The three languages briefly introduced in the talk are: bsv, chisel, and myhdl. The goal of the talk is simply to raise awareness of the three...
Elliptic Curve Cryptography
Secure online communications require encryption. One standard is AES (Advanced Encryption Standard) from NIST. But for this to work, both sides need the same key for encryption and decryption. This is called Private Key encryption.
Half-band filter on Xilinx FPGA
1. DSP48 Slice in Xilinx FPGA
There are many DSP48 Slices in most Xilinx® FPGAs, one DSP48 slice in Spartan6® FPGA is shown in Figure 1, the structure may different depending on the device, but broadly similar.
Figure 1: A whole DSP48A1 Slice in Spartan6 (www.xilinx.com)
2. Symmetric Systolic Half-band FIRFigure 2: Symmetric Systolic Half-band FIR Filter
3. Two-channel Symmetric Systolic Half-band FIRFigure 3: 2-Channel...
Two jobs
For those of you following closely embeddedrelated and the other related sites, you might have noticed that I have been less active for the last couple of months, and I will use this blog post to explain why. The main reason is that I got myself involved into a project that ended up using a better part of my cpu than I originally thought it would.
edit - video of the event:
I currently have two jobs: one as an electrical/dsp engineer recycled as a web publisher and the other...
New Comments System (please help me test it)
I thought it would take me a day or two to implement, it took almost two weeks...
But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.
Which means that:
- You can easily add images, either by drag and drop or through the 'Insert Image' button
- You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
- You can add code snippets and they will be highlighted with highlights.js
- You can edit...
Data Types for Control & DSP
There's a lot of information out there on what data types to use for digital signal processing, but there's also a lot of confusion, so the topic bears repeating.
I recently posted an entry on PID control. In that article I glossed over the data types used by showing "double" in all of my example code. Numerically, this should work for most control problems, but it can be an extravagant use of processor resources. There ought to be a better way to determine what precision you need...
Running Average
The running average filter is a useful way to reduce noise in a system. One project I recently worked on required a 4 times frequency output from an encoder input. The problem was the encoder is mounted to the wheel of an old truck and bearing noise was making the original algorithm generate way too many pulses. The original algorithm worked, but the noise on the input made it useless.
I first implemented the moving average based on
